|
1) Which operations are performed by the bit manipulating instructions of boolean processor? a. Complement bit b. Set bit c. Clear bit d. All of the above
|
||||
|
2) Which data memory control and handle the operation of several peripherals by assigning them in the category of special function registers? a. Internal on-chip RAM b. External off-chip RAM c. Both a & b d. None of the above
|
||||
|
3) Why is the speed accessibility of external data memory slower than internal on-chip RAM? a. Due to multiplexing of lower order byte of address-data bus b. Due to multiplexing of higher order byte of address-data bus c. Due to demultiplexing of lower order byte of address-data bus d. Due to demultiplexing of higher order byte of address-data bus
|
||||
|
4) Which register usually store the output generated by ALU in several arithmetic and logical operations? a. Accumulator b. Special Function Register c. Timer Register d. Stack Pointer
|
||||
|
5) Why is CHMOS technology preferred over HMOS technology for designing the devices of MCS-51 family? a. Due to higher noise immunity b. Due to lower power consumption c. Due to higher speed d. All of the above
|
||||
|
6) Which condition approve to prefer the EPROM/ROM versions for mass production in order to prevent the external memory connections? a. size of code < size of on-chip program memory b. size of code > size of on-chip program memory c. size of code = size of on-chip program memory d. None of the above
|
||||
|
7) Which among the below mentioned devices of MCS-51 family does not possess two 16 -bit timers/counters? a. 8031 b. 8052 c. 8751 d. All of the above
|
||||
|
8) Which characteristic/s of accumulator is /are of greater significance in terms of its functionality? a. Ability to store one of the operands before the execution of an instruction b. Ability to store the result after the execution of an instruction c. Both a & b d. None of the above
|
||||
|
9) Which general purpose register holds eight bit divisor and store the remainder especially after the execution of division operation? a. A-Register b. B-Register c. Registers R0 through R7 d. All of the above
|
||||
|
10) How many registers can be utilized to write the programs by an effective selection of register bank in program status word (PSW)? a. 8 b. 16 c. 32 d. 64
|
||||
|
11) Which operations are performed by stack pointer during its incremental phase? a. Push b. Pop c. Return d. All of the above
|
||||
|
12) Which is the only register without internal on-chip RAM address in MCS-51? a. Stack Pointer b. Program Counter c. Data Pointer d. Timer Register
|
||||
|
13) What kind of instructions usually affect the program counter? a. Call & Jump b. Call & Return c. Push & Pop d. Return & Jump
|
||||
|
14) What is the default value of stack once after the system undergoes the reset condition? a. 07H b. 08H c. 09H d. 00H
|
||||
|
15) Which bit/s play/s a significant role in the selection of a bank register of Program Status Word (PSW)? a. RS1 b. RS0 c. Both a & b d. None of the above
|
||||
|
16) Which flags represent the least significant bit (LSB) and most significant bit (MSB) of Program Status Word (PSW) respectively? a. Parity Flag & Carry Flag b. Parity Flag & Auxiliary Carry Flag c. Carry Flag & Overflow Flag d. Carry Flag & Auxiliary Carry Flag
|
||||
|
17) Which register bank is supposed to get selected if the values of register bank select bits RS1 & Rs0 are detected to be '1' & '0' respectively? a. Bank 0 b. Bank 1 c. Bank 2 d. Bank 3
|
||||
|
18) It is possible to set the auxiliary carry flag while performing addition or subtraction operations only when the carry exceeds _______ a. 1st bit b. 2nd bit c. 3rd bit d. 4th bit
|
||||
|
19) Which locations of 128 bytes on-chip additional RAM are generally reserved for special functions? a. 80H to 0FFH b. 70H to 0FFH c. 90H to 0FFH d. 60H to 0FFH
|
||||
|
20) Which commands are used for addressing the off-chip data and associated codes respectively by data pointer? a. MOVX & MOVC b. MOVY & MOVB c. MOVZ & MOVA d. MOVC & MOVY
|
||||
