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1) In weighted resistor DAC, how many resistor/s per bit is/are required? a. One b. Two c. Three d. Four
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2) In DAC, resolution increases with the _________ in number of bits. a. Increase b. Decrease c. Constant d. None of the above
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3) Which among the following characteristics of D/A converter occur/s due to resistor and semiconductor aging? a. Speed b. Settling time c. Long term drift d. Supply rejection
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4) In DACs, which type of error/s specify/ies the amount by which the actual output of DAC differ from ideal straight line transfer characteristics? a. Linearity error b. Offset error c. Gain error d. All of the above
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5) Offset error is basically defined as the non-zero level of analog output especially when all the digital inputs are ____. a. 0 b. 1 c. Both a and b d. None of the above
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6) Basically, PLL is used to lock _______ a. Its output frequency b. Phase to the frequency c. Phase of the input signal d. All of the above
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7) In communication circuits, PLL is currently applicable for __________ a. Demodulation applications b. Tracking a carrier or synchronizing signal c. Both a and b d. None of the above
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8) In the locked state of PLL, the phase error between the input & output is _________. a. Maximum b. Moderate c. Minimum d. All of the above
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9) Once the phase is locked, the PLL tracks the variation in the input frequency. This indicates that _____ a. Output frequency changes by same amount as that of input frequency b. Output frequency does not change as that of input frequency c. There is no relation between input & output frequencies d. None of the above
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10) In PLL, the capture range is always _________the lock range. a. Greater than b. Equal to c. Less than d. None of the above
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