1) Which mode of operation is exhibited by RS-485 standard? a. Single ended b. Differential c. Both a and b d. None of the above
|
||||
2) In Von Neumann architecture, which among the following handles all the operations of the system that are inside and outside the processor? a. Input Unit b. Output Unit c. Control Unit d. Memory Unit
|
||||
3) In CPU structure, where is one of the operand provided by an accumulator in order to store the result? a. Control Unit b. Arithmetic Logic Unit c. Memory Unit d. Output Unit
|
||||
4) In CPU structure, which register provides the address for fetching of data or instruction especially by means of processor? a. Data Register b. Instruction Register c. Accumulator d. Memory Address Register
|
||||
5) In CPU structure, what kind of instruction to be executed is held by an instruction Register (IR)? a. Current (present) b. Previous c. Next d. All of the above
|
||||
6) In ADSP 21xx architecture, which notation represents ALU overflow condition? a. AC b. AV c. NE d. EQ
|
||||
7) Which kind of low-order 16 bits control register is also regarded as 'Machine Status Word' (MSW) in order to make it compatible with i286? a. CR0 b. CR1 c. CR2 d. CR3
|
||||
8) In the test registers, what do/does the linear address bit hold/s with respect to TLB (Translation Look-aside Buffers)? a. Physical address b. Selection between write and lookup of TLB c. Tag field d. All of the above
|
||||
9) For addressing in real mode, which segment plays a significant role in the storage of destination operands during the string operation? a. Code Segment b. Data Segment c. Stack Segment d. Extra Segment
|
||||
10) In x86 architecture, which type of gate acts as an intermediary between code segments at different privilege levels (PLs)? a. Call gates b. Task gates c. Interrupt gates d. Trap gates
|