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1) Which function/s is/are provided by Integrated Memory Management Unit in 80386 architecture? a. Optional on-chip paging b. 4 levels of protection c. Virtual Memory Support d. All of the above
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2) Which unit in 80386 DX architecture plays a crucial role in the conversion of linear address to physical address? a. Execution b. Protection c. Segmentation d. Paging
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3) In Intel x86 architecture, which general purpose register is used for repeated string instructions as well as shift, rotate and loop instructions? a. EAX (Accumulator) b. ECX (Counter) c. EDX (Data register) d. EBP (Data Pointer)
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4) Which status flag in x86 family is used to enable or disable the interrupt especially when the Pentium processor operates in the virtual mode? a. ID b. VIP c. VIF d. AC
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5) Which control register in x86 family is reserved for future use and generally not adopted for current implementation? a. CR0 b. CR1 c. CR2 d. CR4
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6) Which functional unit of ARM family architecture is responsible for upgrading the address register contents before the core reads or writes the next register value from memory location? a. Data bus b. Barrel Shifter c. Incrementer d. Instruction Decoder
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7) Which type of non-privileged processor mode is entered due to raising of high priority of an interrupt? a. User mode b. Fast Interrupt Mode (FIQ) c. Interrupt Mode (IRQ) d. Supervisor Mode (SVC)
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8) Abort mode generally enters when _______ a. an attempt access memory fails b. low priority interrupt is raised c. ARM processor is on rest d. undefined instructions are to be handled
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9) In the process of pipelining, which instructions are fetched from the memory by the ARM processor during the execution of current instruction? a. Previous b. Present c. Next d. All of the above
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10) If the three stages of execution in pipelining are overlapped, how would be the speed of execution? a. Higher b. Moderate c. Lower d. Unpredictable
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