MCQs: An event is nothing but ______ target signal, which is to be updated.
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MCQs: Which functions are performed by static timing analysis in simulation?
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MCQs: Which among the following is/are regarded as the function/s of translation step in synthesis process?
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MCQs: In synthesis flow, which stage/s is/are responsible for converting an unoptimized boolean description to PLA format?
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MCQs: In synthesis flow, the flattening process generates a flat signal representation of _____levels.
A. AND
B. OR
C. NOT
D. EX-OR
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MCQs: If the level of fan-out is beyond a limit in synthesis, it results in an insertion of buffer by ultimate effect of _____ the speed.
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MCQs: Which among the following constraint/s is/are involved in a state-machine description?
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MCQs: Which among the following is/are identical in Mealy & Moore machines?
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MCQs: Which method/s is/are adopted for acquiring spike-free outputs?
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MCQs: In SM chart for UART transmitter, which state/s indicate/s the waiting of sequential machine for the rising edge of bit clock and the consequent clearing of low order bit of TSR in order to transmit logic '0' for one bit time?
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MCQs: The devices which are based on fusible link or antifuse are _________time/s programmable.
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MCQs: Which among the following is/are not suitable for in-system programming?
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MCQs: Simple Programmable Logic Devices (SPLDs) are also regarded as _____________.
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MCQs: In signal integrity, which noise/s occur/s due to impedance mismatch, stubs, vias and other interconnection discontinuities?
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MCQs: In floorplanning, placement and routing are __________ tools.
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MCQs: In floorplanning, which phase/s play/s a crucial role in minimizing the ASIC area and the interconnection density?
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MCQs: In CMOS inverter, the propagation delay of a gate is the/an _________ transition delay time for the signal during propagation from input to output especially when the signal changes its value.
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MCQs: For complex gate design in CMOS, OR function needs to be implemented by _______ connection/s of MOS.
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MCQs: In MOS devices, the current at any instant of time is ______of the voltage across their terminals.
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MCQs: On the basis of an active load, which type of inverting CMOS amplifier represents low gain with highly predictable small and large signal characteristics?
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