VLSI Design & Technology Test Questions


Q.  Which concept proves to be beneficial in acquiring concurrency and order independence?

a. Alpha delay
b. Beta delay
c. Gamma delay
d. Delta delay


ANSWER: See Answer
 
No explanation is available for this question!
MCQs:  An ideal op-amp has ________
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  Stuck open (off) fault occur/s due to _________
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  Which type/s of stuck at fault model exhibit/s the reduced complexity level of test generation?
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  Why is multiple stuck-at fault model preferred for DUT?
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  Which among the following EDA tool is available for design simulation?
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  Which among the following functions are performed by MSI category of IC technology?
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  The 'next' statements skip the remaining statement in the ________ iteration of loop and execution starts from first statement of next iteration of loop.
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  An Assert is ______ command.
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  Timing analysis is more efficient with synchronous systems whose maximum operating frequency is evaluated by the _________path delay between consecutive flip-flops.
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  What is/are the necessity/ies of Simulation Process in VHDL?
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  Why is the use of mode buffer prohibited in the design process of synthesizer?
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  If a port is declared as buffer, then which problem is generated in hierarchical design due to mapping with port of buffer mode of other entities only?
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  Which UART component/s divide/s the system clock to provide the bit clock with the period equal to one bit time and Bclock x 8?
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  In Gray coding, when the state machine changes state, ______ bit/s in the state vector changes the value.
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  Which type of CPLD packaging comprises pins on all four sides that wrap around the edges of chip?
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  An antifuse element initial provides ______ between two conductors in absence of the application of sufficient programming voltage.
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  In spartan-3 family architecture, which programmable functional element accepts two 18 bit binary numbers as inputs and computes the product?
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  Which level of routing resources are supposed to be the dedicated lines allowing output of each tile to connect directly to every input of eight surrounding tiles?
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  Maze routing is also known as ________
Category: Electronic Engineering Questions,   Published by: teswesm
MCQs:  Maze routing is used to determine the _______path for a single wire between a set of points, if any path exists.
Category: Electronic Engineering Questions,   Published by: teswesm