VLSI Design & Technology Test Questions

Q.  Which among the following is/are responsible for the occurrence of 'Delay Faults'?

a. Variations in circuit delays & clock skews
b. Improper estimation of on-chip interconnect & routing delays
c. Aging effects & opens in metal lines connecting parallel transistors
d. All of the above


ANSWER: See Answer
 
No explanation is available for this question!