VLSI Design & Technology Test Questions

Q.  _________ is the fundamental architecture block or element of a target PLD.

a. System Partitioning
b. Pre-layout Simulation
c. Logic cell
d. Post-layout Simulation


ANSWER: See Answer
 
No explanation is available for this question!
MCQs:  Before the commencement of design, the clocking strategy determine/s __________
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which method/s of physical clocking is/are a /the recursive structure where the memory elements are grouped together to make the use of nearby or same distribution points?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Increase in the physical distance of H-tree _________the skew rate.
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which type of MOSFET exhibits no current at zero gate voltage?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  In enhancement MOSFET, the magnitude of output current __________ due to an increase in the magnitude of gate potentials.
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  In DIBL, which among the following is/are regarded as the source/s of leakage?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which among the following can be regarded as an/the application/s of MOS switch in an IC design?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  In MOS switch, clock feedthrough effect is also known as __________. A. charge injection B. charge feedthrough C. charge carrier D. charge ejaculation
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which among the following is/are regarded as an/the active resistor/s?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  In testability, which terminology is used to represent or indicate the formal evidences of correctness?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which among the following is regarded as an electrical fault?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which among the following faults occur/s due to physical defects?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  In logic synthesis, ________ is an EDIF that gives the description of logic cells & their interconnections.
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which level of system implementation includes the specific function oriented registers, counters & multiplexers?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which among the following is/are taken into account for post-layout simulation?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which among the following operation/s is/are executed in physical design or layout synthesis stage?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  In VHDL, which class of scalar data type represents the values necessary for a specific operation?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which among the following is pre-defined in the standard package as one-dimensional array type comprising each element of BIT type?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  In composite data type of VHDL, the record type comprises the elements of _______data types.
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which among the following wait statement execution causes the enclosing process to suspend and then wait for an event to occur on the signals?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts