VLSI Design & Technology Test Questions

Q.  In fusible link technologies, the undesired fuses are removed by the pulse application of _____voltage & current to device input.

a. Low
b. Moderate
c. High
d. All of the above


ANSWER: See Answer
 
No explanation is available for this question!
MCQs:  Which among the following wait statement execution causes the enclosing process to suspend and then wait for an event to occur on the signals?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  After an initialization phase, the simulator enters the ______phase.
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which concept proves to be beneficial in acquiring concurrency and order independence?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  An event is nothing but ______ target signal, which is to be updated.
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which functions are performed by static timing analysis in simulation?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which among the following is/are regarded as the function/s of translation step in synthesis process?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  In synthesis flow, which stage/s is/are responsible for converting an unoptimized boolean description to PLA format?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  In synthesis flow, the flattening process generates a flat signal representation of _____levels. A. AND B. OR C. NOT D. EX-OR
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  If the level of fan-out is beyond a limit in synthesis, it results in an insertion of buffer by ultimate effect of _____ the speed.
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which among the following constraint/s is/are involved in a state-machine description?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which among the following is/are identical in Mealy & Moore machines?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which method/s is/are adopted for acquiring spike-free outputs?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  In SM chart for UART transmitter, which state/s indicate/s the waiting of sequential machine for the rising edge of bit clock and the consequent clearing of low order bit of TSR in order to transmit logic '0' for one bit time?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  The devices which are based on fusible link or antifuse are _________time/s programmable.
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Which among the following is/are not suitable for in-system programming?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  Simple Programmable Logic Devices (SPLDs) are also regarded as _____________.
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  In signal integrity, which noise/s occur/s due to impedance mismatch, stubs, vias and other interconnection discontinuities?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  In floorplanning, placement and routing are __________ tools.
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  In floorplanning, which phase/s play/s a crucial role in minimizing the ASIC area and the interconnection density?
Category: Electronic Engineering Questions,   Published by: T-Code Scripts
MCQs:  In CMOS inverter, the propagation delay of a gate is the/an _________ transition delay time for the signal during propagation from input to output especially when the signal changes its value.
Category: Electronic Engineering Questions,   Published by: T-Code Scripts