MCQs: Which microcontrollers are adopted for designing medium scale embedded systems?
Category: Electronic Engineering Questions, Published by: teswesm
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MCQs: In Cortex-A processor series, which among the following is the standalone and smallest processor in size constraints with high-end application support?
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MCQs: Which interrupt controller is present in Cortex-A15 processor?
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MCQs: In Cortex-R processor series, which among the following represent/s dual core configuration along with the space saving the floating point unit?
Category: Electronic Engineering Questions, Published by: teswesm
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MCQs: For the supplied data, which edge level is necessary for LCD in order to latch the data?
Category: Electronic Engineering Questions, Published by: teswesm
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MCQs: In LCD, which function is executed by '0x05' hex command?
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MCQs: In LCD, which hex command performs the function of 'Display on, cursor on and blinking'?
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MCQs: In DC motor interfacing, which field/s is/are generated by forcing current through the coil for spinning of the motor?
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MCQs: In DC motor interfacing, which modulation controls the duty cycle of square wave provided at the output by generating variation in the average DC voltage?
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MCQs: What is the value of maximum data rate in RS 232 standard?
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MCQs: In Modbus Protocol, which codes are included in Request PDU?
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MCQs: Which category of function code represents the currently used codes by some companies especially for legacy products?
Category: Electronic Engineering Questions, Published by: teswesm
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MCQs: In ISA, what is/are the application/s of Timer2 which acts as a speaker timer?
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MCQs: In ISA, Timer 0 is also regarded as ______
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MCQs: Match the following STKY multiplier (MAC) flag notations with their meanings in ADSP 21 xx family architecture.
A. MOS ------------------ 1) Multiplier floating-point invalid operation
B. MIS ------------------- 2) Multiplier Underflow
C. MUS ------------------ 3) Multiplier floating-point overflow
D. MVS ------------------ 4) Multiplier fixed-point overflow
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MCQs: In ADSP 21 xx architecture, how many previously executed instructions are stored in instruction cache of cache memory?
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MCQs: In TMS 320 C5X processor, which operation/s is/are performed by Compare Select & Store Unit (CSSU)?
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MCQs: In TMS 320 C5X processor, which memory segment provides interfacing to external memory mapped peripherals and also serves as extra data storage space?
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MCQs: How are the instructions executed in DSP Processors?
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MCQs: The utilization of CAD tools for drawing timing waveform diagram and transforming it into a network of logic gates is known as ________.
Category: Electronic Engineering Questions, Published by: teswesm
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